Code that copies output signals from the arrays to the entity's interface.
If this key is found in a line of the template file during code generation, then that whole line will be copied the same number of times as there are output signals of all types, and in each copy, the %OUTPUT_MAP% key is replaced by an assignment statement that copies an output signal in the array to a VHDL entity output signal. The entity output signal has the same name as the corresponding output of the top-level node. Hence, the entity should be declared as in the example for %type_INPUT_NAMES%.
VHDL